dw3000_spi.c
ESP-IDF SPI backend for the DW3000 decadriver — implements dw3000_spi.h.
Overview
ESP-IDF SPI backend for the DW3000 decadriver — implements dw3000_spi.h. Replaces the Zephyr deps/dw3000/platform/dw3000_spi.c (not compiled here). CS is a plain GPIO (spics_io_num = -1), matching the Zephyr cs-gpios model, so the wakeup path can hold CS low ~500us. Each DW3000 command is one CS-low full-duplex transfer: header + body assembled in a DMA-capable, word-aligned bounce buffer; on reads the body slice of the RX buffer is copied back.
depends on board_pins.h
API
Fint dw3000_spi_init(void)
Bring up the DW3000 SPI bus and CS GPIO for this port. Idempotent: returns 0 immediately if already initialized. Configures CS as an active-low output (idle high), initializes the SPI bus with DMA disabled (transfers <=64 B use CPU data registers directly; larger ones are chunked by dw_xfer), and adds both a slow-clock and fast-clock device handle on the bus. Starts the active device at slow speed. Only the DW3000 sits on this bus. Returns 0 on success, -1 if bus init or device add fails.
Fvoid dw3000_spi_speed_slow(void)
Switch subsequent DW3000 SPI transfers to the slow-clock device handle.
Fvoid dw3000_spi_speed_fast(void)
Switch subsequent DW3000 SPI transfers to the fast-clock device handle.
Fvoid dw3000_spi_fini(void)
Tears down the DW3000 SPI bus: removes the slow and fast SPI device handles if present, then frees the SPI bus on WOZ_DW3000_SPI_HOST. Safe to call when devices were never added (each handle is checked for non-NULL before removal).
Fstatic int32_t dw_xfer(const uint8_t *hdr, uint16_t hlen, const uint8_t *body, uint16_t blen, uint8_t *rx_body, const uint8_t *crc)
One CS-low command: [header][body|zeros][crc?]; capture RX body slice when rx_body != NULL.
dw3000_spi_read, dw3000_spi_write, dw3000_spi_write_crcFint32_t dw3000_spi_read(uint16_t headerLength, uint8_t *headerBuffer, uint16_t readLength, uint8_t *readBuffer)
Read from the DW3000 over SPI: sends a header then clocks in readLength bytes. Thin wrapper over dw_xfer with no body write and no CRC. Returns whatever dw_xfer returns.
dw_xferFint32_t dw3000_spi_write(uint16_t headerLength, const uint8_t *headerBuffer, uint16_t bodyLength, const uint8_t *bodyBuffer)
Write to the DW3000 over SPI: sends a header followed by a body, no CRC byte. Thin wrapper over dw_xfer with no read capture. Returns whatever dw_xfer returns.
dw_xferFint32_t dw3000_spi_write_crc(uint16_t headerLength, const uint8_t *headerBuffer, uint16_t bodyLength, const uint8_t *bodyBuffer, uint8_t crc8)
Write to the DW3000 over SPI with a trailing CRC8 byte appended after the body. Thin wrapper over dw_xfer with no read capture. Returns whatever dw_xfer returns.
dw_xferFvoid dw3000_spi_wakeup(void)
Wake the DW3000 from sleep by toggling CS. Drives CS low for ~500us then releases it high, per the Qorvo CS-toggle wake sequence. Blocks for the duration of the delay.
Fvoid dw3000_spi_trace_output(void)
No-op: SPI transaction tracing is not implemented in this port.